The Signal Lab
Don't take the
paper's word for it.
These three instruments run the same LFSR semantics as the released RTL, live in your tab — no servers, nothing recorded. They are the paper's three central claims, made touchable: the one-gate multiply, the free dithering, and the graceful failure.
Multiply with one gate.
Two values become pulse densities; one AND gate computes their product; a counter reads it back. Drag the sliders, reseed the streams, and watch 1/√L do its honest work.
Banding, dissolved by physics.
Drop the display to 3 bits and binary draws contour lines. The stochastic estimate at the same depth renders smooth — its quantization noise is provably white, which is exactly what display engineers pay extra hardware for.
Same gradient, same 3-bit display. Binary quantization draws contour lines — banding. The stochastic estimate's noise is spectrally white (proved in the paper), so the eye integrates it into a smooth ramp. The dithering hardware costs nothing: it is the arithmetic.
The wave bends. The integer shatters.
Inject bit errors into both representations of the same image. In binary, a flipped MSB is a half-scale explosion; in a stream, any flipped bit is worth 1/L. Find the crossover yourself — including the region below it where binary honestly wins.
Same gradient, same per-bit fault probability, fresh random pattern each run. The paper's site-resolved version (N=10,000, 95% CI) puts the compute-domain crossover at ~0.5% BER — matching the analytic 0.6%. Storage and control faults are a different story, and the paper says so.
Everything above is the browser miniature of the released design — the real thing is synthesizable Verilog that fits a $25–55 FPGA and drives a VGA monitor. Build it for $80–150 →