The hardware
A GPU you build
with your hands.
Not a metaphor. The StochastiCore pipeline fits a hobby-class FPGA, drives a real VGA monitor through sixteen resistors, and takes commands from an Arduino. The build guide assumes you have never touched an FPGA. Total parts: $80–150.
- Display
- 320×240 @ 60 Hz (VGA, pixel-doubled to 640×480)
- Color
- RGB332 — 256 colors via an R-2R resistor DAC
- Compute
- 4 parallel SC compute units (SIMD)
- Precision knob
- runtime knob: L = 256 (fast, noisy) → 65,536 (slow, near-exact)
- Host interface
- any microcontroller over SPI (Arduino, STM32)
- FPGA footprint
- ~2,400 LUTs — ~30% of a $25–55 iCE40 HX8K board
- Toolchain
- 100% open source (Yosys + nextpnr); no proprietary tools, no NDAs
| Bill of materials | Price | Why it's there |
|---|---|---|
| FPGA board (Lattice iCE40 HX8K class) | $25–55 | the GPU lives here — using ~30% of it |
| Host microcontroller (Arduino / STM32) | $2–12 | sends draw commands over SPI |
| VGA connector + R-2R resistor DAC | $2–4 | 16 resistors make the color signal |
| Breadboards, jumpers, level shifter | $15–20 | no soldering required to start |
| Oscillators, passives, LEDs, cables | $10–15 | 25.175 MHz pixel clock and friends |
| VGA monitor | $0–15 | any 640×480-capable screen, thrift stores count |
| Total | $80–150 | everything, including cables |
Build status — stated honestly
Where the physical GPU actually stands.
RTL complete & revised
all reviewer fixes applied — S2B scaling, SPI port, synthesizable rasterizer
Synthesis verified
one Yosys flow regenerates every cell/LUT count; fits iCE40 HX8K
Bit-accurate simulation
rendering, faults, dithering on the verified LFSR model
Build guide written
68 pages — BOM, wiring, bring-up, debugging, from zero
Physical FPGA bring-up
timing closure and measured power in progress — not claimed until measured
Dev Kit productization
kitted parts + printed guide; then the ASIC question
physical FPGA validation in progress — timing closure and measured silicon power are NOT yet claimed; every published number is from RTL, synthesis, or simulation, labelled as such
The build, in one breath
From parts bag to glowing monitor.
- 01Wire the DAC
Sixteen resistors on a breadboard become a 256-color video DAC — the moment analog electronics stops being abstract.
- 02Flash the GPU
Yosys + nextpnr synthesize the open Verilog onto the FPGA. No licenses, no NDAs, no vendor lock.
- 03Connect the host
An Arduino speaks SPI: clear screen, load matrix, draw triangle. You wrote a GPU driver without noticing.
- 04Turn the knob
One register sweeps L from 256 to 65,536 — watch the same silicon trade speed for precision before your eyes.